Semiconductor testing is a critical link in the semiconductor industrial chain to ensure device performance, reliability and quality. Through a series of electrical, physical and environmental tests, it verifies whether chips comply with specification requirements throughout the full lifecycle from design to mass production. Its core objectives are screening out non-conforming products, optimizing production processes and reducing risks in downstream applications. It is widely applied to semiconductor products such as integrated circuits (ICs), discrete devices and sensors.

Semiconductor testing runs through the entire process from design to shipment. It can be divided into the following four categories by stage:

1. Design Validation Test (DVT)

• Purpose: Before chip tape-out (mass production), verify the correctness of design schemes, functional integrity and performance compliance, so as to avoid mass production losses caused by design defects.

• Test Items:

• Functional Test: Verify whether the chip realizes all designed functions (e.g., CPU instruction set, GPU rendering function);

• Performance Test: Test whether key parameters (such as frequency, power consumption and latency) meet design specifications (e.g., "Main frequency ≥ 3.0GHz", "Standby power consumption ≤ 5mW");

• Boundary Condition Test: Verify chip stability under extreme voltage and temperature (e.g., normal functions under minimum/maximum operating voltage).

• Features: Small sample size (usually dozens of engineering samples), dependent on manual or semi-automatic test platforms, long test cycle (several weeks to months).

2. Wafer Test (WT / CP - Chip Probe)

• Purpose: Before wafer dicing, test each bare die on the wafer to screen out defective chips and reduce subsequent packaging costs (avoid packaging defective dies).

• Test Scenario: The wafer is fixed on a prober. Probes make contact with test pads of chips, and test equipment applies signals and collects responses.

• Core Test Items:

• DC Parameter Test: Such as leakage current (Iddq, quiescent power supply current), operating voltage (Vdd), pin connectivity (to avoid short circuit / open circuit);

• Basic Functional Test: Verify whether core chip functions work normally (e.g., read and write functions of memory chips);

• Preliminary Performance Test: Basic indicators such as frequency and speed (e.g., "stable operation at 1GHz").

• Features: Fast test speed (to match wafer mass production efficiency), coordinated operation of automatic probers and test equipment, medium test coverage (only screen out obvious defective dies).

3. Final Test (FT)

• Purpose: After chip packaging (such as QFP, BGA, SiP packaging), conduct comprehensive tests on finished chips to ensure no defects are introduced during packaging (such as broken leads and poor heat dissipation), and verify that performance meets shipment standards.

• Test Scenario: Packaged chips are fed by automatic equipment (such as a test handler), make contact with the test socket, and tests are completed by an Automatic Test Equipment (ATE).

• Core Test Items:

• Full Functional Test: Cover all functional modules of the chip (such as CPU, GPU, ISP and interfaces of SoC);

• AC Parameter Test: Test timing characteristics of high-frequency signals (such as Setup Time / Hold Time, signal transmission latency);

• Power Consumption Test: Power consumption under different loads (such as full-load power consumption and dynamic power consumption);

• Pin Integrity Test: Verify pin connectivity after packaging (avoid poor bonding or broken leads during packaging).

• Features: High test coverage (close to 100%), dependent on high-speed ATE equipment, fast test speed (several chips can be tested per second), serving as the main testing procedure in mass production.

4. Reliability Test (RT)

• Purpose: Evaluate chip stability under long-term operation or harsh environments, predict service life, and ensure compliance with reliability requirements of downstream applications (e.g., automotive electronics requires "automotive-grade" reliability).

• Test Standards: Follow standards such as JEDEC (Joint Electron Device Engineering Council) or AEC-Q (Automotive Electronics Council). Common test items include:

• High Temperature Operating Life (HTOL): Chips operate continuously for 1000-2000 hours under high temperature (e.g., 125℃) and rated voltage to test performance degradation;

• Temperature Cycling (TC): Hundreds of cycles between -55℃~125℃ to test the chip’s resistance to thermal stress (prevent package cracking and solder joint detachment);

• Electro-Static Discharge (ESD): Simulate human or machine discharge (such as HBM Human Body Model, MM Machine Model) to test the chip’s resistance to electrostatic breakdown (e.g., HBM ≥ 2kV);

• Moisture Sensitivity Level (MSL): Evaluate chip reliability in humid environments (avoid package cracking caused by water vapor expansion during soldering).

  Features: Small sample size (usually 1-5% of the batch), long test cycle (several weeks or even months), a mandatory test item for automotive-grade and industrial-grade chips.